1. What's the "when VCO is in lock" mean in below marked sentence? It means during the lock time or after VCO is locked? 2. When SCK and SDIO is toggled, how much will the phase noise be degraded? 3. How to avoid or relieve this PN performance degrade? Thank you. Ki...
[L] 93 SPR_SDIO_DATA3 - PIN_SDIO_DATA3 86 CN4[L] 95 GND - -- CN4[L] 97 SPR_SDIO_WP D37 PIN_SDIO_WP 88 CN4[L] 99 GND - -- CN4[R] 2 5V - -- CN4[R] 4 5V - -- CN4[R] 6 ACP_SPAP - -- CN4[R] 8 ACP_SPAN - -- CN4[R] 10 ACP_...