&csi2_dphy_hw { status ="okay"; }; &csi2_dphy0 { status ="disabled"; }; &csi2_dphy1 { status ="okay"; ports {#address-cells =<1>;#size-cells =<0>;port@0{ reg = <0>;#address-cells =<1>;#size-cells =<0>;dphy1_in: endpoint@1{ reg = <1>; remote-endpoint = <&...
csi2_dphy0与csi2_dphy1/csi2_dphy2互斥,不可同时使用。另外需要使能csi2_dphy_hw节点 &csi2_dphy0 { status = "okay"; /* * dphy0 only used for full mode, * full mode and split mode are mutually exclusive */ ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg =...
仅使用csi2_dphy0,csi2_dphy0与csi2_dphy1/csi2_dphy2互斥,不可同时使用; data lane最大4 lanes; 最大速率2.5Gbps/lane; Split Mode: 仅使用csi2_dphy1和csi2_dphy2, 与csi2_dphy0互斥,不可同时使用; csi2_dphy1和csi2_dphy2可同时使用; csi2_dphy1和csi2_dphy2各自的data lane最大是2 lanes;...
&csi2_dphy_hw { status ="okay"; }; &csi2_dphy0 { status ="disabled"; }; &csi2_dphy1 { status ="okay"; ports {#address-cells =<1>;#size-cells =<0>;port@0{ reg = <0>;#address-cells =<1>;#size-cells =<0>;dphy1_in: endpoint@1{ reg = <1>; remote-endpoint = <&...
[ 0.700958] rockchip-csi2-dphy-hw fe870000.csi2-dphy-hw: csi2 dphy hw probe successfully! [ 0.704595] phy phy-fe8b0000.usb2-phy.0: Linked as a consumer to regulator.4 [ 0.704833] phy phy-fe8b0000.usb2-phy.1: Linked as a consumer to regulator.4 [ 0.705023] phy phy-fe8b0000...
&csi2_dphy_hw { status = "okay"; }; &csi2_dphy1 { status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; hdmi_to_mipi_in: endpoint@1 { ...
|-- phy-rockchip-csi2-dphy-common.h |-- phy-rockchip-csi2-dphy-hw.c |-- phy-rockchip-csi2-dphy.c |-- drivers/media |-- v4l2-core |-- platform/rockchip/cif RKCIF驱动 |-- platform/rockchip/isp RKISP驱动 |-- dev.c 包含 probe、异步注册、clock、pipeline、 iommu及media/v4l2 fra...
MIPI CSI用法 RK3566/RK3568平台仅有一个标准物理mipi csi2dphy,可以工作在两个模式:full mode和split mode,拆分为csi2_dphy0/csi2_dphy1/csi2_dphy2三个逻辑dphy(参见rk3568.dtsi)Full Mode 仅使用csi2_dphy0,csi2_dphy0与csi2_dphy1/csi2_dphy2互斥,不可同时使用;data lane最大4lanes;最大速率2.5...
- entity 70: m01_f_ov5648 4-0036 (1 pad, 1 link) type V4L2 subdev subtype Sensor device node name /dev/v4l-subdev3 pad0: Source [fmt:SBGGR10/2592x1944] -> "rockchip-csi2-dphy0":0 []- entity 74: m00_b_ov13850 4-0010 (1 pad, 1 link) type V4L2 subdev subtype Sensor devi...
- entity 70: m01_f_ov5648 4-0036 (1 pad, 1 link) type V4L2 subdev subtype Sensor device node name /dev/v4l-subdev3 pad0: Source [fmt:SBGGR10/2592x1944] -> "rockchip-csi2-dphy0":0 [] - entity 74: m00_b_ov13850 4-0010 (1 pad, 1 link) type V4L2 subdev subtype Sensor de...