The 64-bit NX27V is a vector processor with 5-stage scalar pipeline that supports the latest RISC-V specification, including the IMAFD standard instructions, “C” 16-bit compression instructions, “P” DSP extension instructions, “V” vector extension instructions and “N” for user-level in...
AndesCore™ AX46MP(V) 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeStar™ V5 architecture and Andes Matrix Multiply (AMM) extension. It supports RISC-V standard “G (IMA-FD)”, “ZC” compression, “B” bit manipulation,...
SiFive was the first company to release a RISC-V Vector 1.0 product, and it took the market by storm. The X280 has quickly achieved market-leading success, with design wins across a number of high performance applications including AI inference, Image Processing, and Datacenter applications. Cus...
optimized for power efficiency and area efficiency, and the SiFive U87 core with vector processing. The SiFive U84 design, focused on optimized efficiency, is the lead standard core, with more details on the SiFive U87 design to be
The Future of Mission Critical Edge Computing is RISC-V David Levy This presentation covered: RISC-V’s role in mission-critical edge computing: virtualization, vector processing and WorldGuard partitioning How RISC-V is transforming space computing and aviation ...
The P670 vector application processor features a thirteen-stage, four-issue, out-of-order pipeline and offers best-in-class performance, with >50% uplift over the SiFive Performance P550, while maintaining a significant performance-per-area advantage compared to the Arm® Cortex®-A78. For...
The 64-bit NX27V is a vector processor with 5-stage scalar pipeline that supports the latest RISC-V specification, including the IMAFD standard instructions, “C” 16-bit compression instructions, “P” DSP extension instructions, “V” vector extension instructions and “N” for user-level in...
In this paper, we present Faust, a RISC-V Floating Point Unit based on FPnew [4] and compatible with the RISC-V Vector extension (RVV). The FP unit is a part of the Vitruvius vector processing unit in the EPAC chip, more specifically part of each vector lane in the VPU consisting ...
Choose between our Cores, Vector, and Tensor units and create your unique pipeline. Tailor-Made Performance: Your Hardware, Your Specifications.. Engineered Precision Design Our tailored solutions ensure optimal performance, reliability, and efficiency, setting the standard for engineering precision. ...
The results show that the speed-up due to the use of the vector pipeline increases with the number of lanes in the vector processor, achieving up to 23.0× the performance of the scalar processor with only 4.3× the resources of the baseline scalar processor. Using an implementation with 32...