如果enable自动协商模式,要确认下link partner是否也是支持千兆速率。 寄存器0x0086 配置的TX和RX的delay是多少?参考这篇RGMII Interface Timing Budgets应用手册: https://www.ti.com/lit/an/snla243/snla243.pdf
It is particularly important in the RGMII interface where the high speed clock needs to synchronize the data on RX and TX lines with maximum allowed skew of 500 ps. See the RGMII Interface Timing Budgets application report. The output channel-to-channel skew for A-to-B direction rising-edge...