By passing this XOR signal and signal C into the second XOR gate with the same principle, SUM signal of the full adder can be obtained. The Boolean expression of SUM can be expressed as A # B # C . With the first three NOR gates, Boolean NOT(A+B), NOT(B+C), and NOT(C+A) ...
then sum bit (S) is the X-OR of A and B and the carry bit (C) will be the AND of A and B. From this it is clear that a half adder circuit can be easily constructed using one X-OR gate and
Maintaining the efficiency of the device is the other critical subject of research. In addition to its usage as a reversible logic gate, this structure may also be multifunctional for alternative purposes, including XOR, comparator, buffer, and NOT logic gates in all-optical processors.Ehsan Ve...
The proposed configurations are optimized (in terms of coupling coefficient, operating wavelength and applied field) to acheive logic operations such as AND, NAND, XOR, XNOR and Fredkin gates. EA modulation mechanism fails to implement OR and NOR gates on a parallel MRR configuration due to ...