16. The method of claim 13, wherein step (c) further comprises mapping kernel memory allocated to one of the one or more SSL cards to user space memory allocated to one of the of the plurality of packet processing engines. 17. The method of claim 16 further comprising: (e) cloning, ...
“A Generalized Processor Sharing Approach to Flow Control in Integrated Services Networks: The Single-Node Case”, IEEE/ACM Transactions on Networking, Vol. 1, No. 3, pp. 344–357, June 1993; J. C. R. Bennett and H. Zhang, “WF2Q: Worst-case Fair Weighted Fair Queueing”, Proc. ...
According to a first instruction mode, a pair of 16 bit instructions are supplied during each machine cycle to the decoder8from the prefetch buffer6. This pair is denoted slot0, slot1in bit sequences W0, W1etc. This is referred to herein as GP16superscaler mode. ...