(mode-1) operating multiple Ca minimal number of) multipliers for the rest of multiplications of high precisions; (2) for a set of input CNNs, we formulate the exploration of the size of a single internal multiplier in MAC unit to derive an 'economical' instance, in terms of computation...
The boost converter with multiple inputs is discussed in [23] that integrate the PV, fuel cell and battery to DC bus bar. The controlling of three electrical sources using this converter is very difficult. Multi-port DC-DC converter with parallel coordination of sources for standalone ...
Sharma, G.; Jadon, V.K. Classification of image with convolutional neural network and TensorFlow on CIFAR-10 dataset. InInnovations in VLSI, Signal Processing and Computational Technologies, Proceedings of the International Conference on Women Researchers in Electronics and Computing, Jalandhar, India,...
In normal operation, the IFTPVI is in the form of a HERIC inverter. Under a faulty condition, the redundant switch-leg replaces the faulty switch-leg. If the bidirectional switch fails, the IFTPVI is reconfigured, and it takes the shape of an H5. All the mentioned actions are handled ...
Novel design of the output stage for four-phase dynamic VLSI logic A novel output stage design for four-phase ratioless dynamic logic is proposed for a low speed asynchronous pump circuit. The main features of the proposed... DC Patel - 《Microelectronics Journal》 被引量: 3发表: 1984年 LOG...
Moreover, the multipliers with a constant can be efficiently implemented in VLSI.S.Nazneen ShagufaS.Sufia AnjumB.Raghunath Reddy
In this work, a meta-heuristic optimization based method, known as the Firefly Algorithm (FA), to achieve the maximum power point (MPP) of a solar photo-voltaic (PV) system under partial shading conditions (PSC) is investigated. The Firefly Algorithm outperforms other techniques, such as the...