需要注意的是,在做平均的功耗分析的时候,PT PX支持读入多个VCD文件,但是条件是需要指定不同的时间,在使用read_vcd命令的时候使用-time指定。 read_vcd还支持有条件的功耗分析,使用-when开关,比如说指定分析在某个信号为true时候的功耗。 使用SAIF文件的时候,涉及的commands有read_saif (read_saif -strip_path TB/...
read_sdc ../src/hdl/gate/mac.sdc set_disable_timing [get_lib_pins ssc_core_typ/*/G] read_parasitics ../src/annotate/mac.spef ### # check, update, or report the timing ### check_timing update_timing report_timing ### # read switching activity ...
Step4: 读sdc,反标寄生参数 read_sdc ../src/hdl/gate/mac.sdc set_disable_timing [get_lib_pins ssc_core_typ/*/G] read_parasitics ../src/annotate/mac.spef.gz sdc指定了设计的驱动单元,用以计算输入的transitiontime。寄生参数是影响动态功耗的因素之一,反标寄生参数文件能够提高功耗分析的准确性。 St...
read_sdc ./my_design.sdc read_parasitics ./my_design_power_corner.spef.gz ### check_timing ...
read_fsdb $fsdb -strip_path $module_hier -format verilog -time {$start_time $end_time} 然后update_power,report_power。可以查看功耗分析报告。 在这之前,建议看一下反标文件报告和时序分析覆盖率报告。 report_annotated_parasitics report_analysis_coverage report_annotated_power -list_annotated 想看功耗...
read_parasitics ../src/annotate/mac.spef.gz Step4: timing报告: 满足时序要求,功耗分析才有意义 check_timing update_timing report_timing tep5: 读入switching_activity文件 读后仿产生的VCD/SAIF文件将真实的翻转率反标到Net上,在read_vcd或者read_saif时要注意通过-stripe_path选项指定合适的hierarchical层次,...
read_parasitics ../src/annotate/mac.spef.gz sdc指定了设计的驱动单元,用以计算输入的transitiontime。寄生参数是影响动态功耗的因素之一,反标寄生参数文件能够提高功耗分析的准确性。 Step5: check timing, update timing和report timing check_timing update_timing ...
The SDC file contains the design constraints. The driver cellinformation is used to calculate the transition time on the primary inputs. Parasitic File Switching Activity In the averaged power analysis, you use either SAIF or VCD file formats to read the switching activity. If you do not specif...
read_vcd command to specify the VCD file in both the averaged and time-based analysis modes. Use the read_vcd command to specify the activity files in other event-based formats within the PrimeTime PX tool. Internally, the tool converts these formats to the VCD format using the appropriate ...
read_verilog mac.vg current_design mac link ### # set transition time / annotate parasitics ### read_sdc ../src//hdl/gate/mac.sdc set_disable_timing [get_lib_pins ssc_core_typ/*/G] read_parasitics ../src/annotate/mac.spef.gz ### check_...