The charge-pump (CP) mismatch current is a dominant source of static phase error and reference spur in the nano-meter CMOS PLL implementations due to its worsened channel length modulation effect. This paper pr
按照Dean Banerjee 的说法, spur 可分为: Reference Spur : Spur的 offset frequency 在 PFD 的参考时钟频率(及其谐波处) Non-reference Spur : 其他的 spur, (源自外部环境的干扰或内部的其他问题) Fractional Spur : 主要是 Fractional-N PLL 中的 spur 这里主要考虑 Reference Spur 的问题 关于spur 的基本计...
“Spur reduction techniques for phase-locked loops exploiting a sub-sampling phase detector.” IEEE J. Solid-State Circuits. 2010, vol. 45, no. 9, pp. 1809–1821. [8] Park D., and Cho S., “A 14.2 mW 2.55-to-3 GHz cascaded PLL with reference injection, 800 MHz delta-sigma ...
Application Note 143 December 2013 A Simple Method to Accurately Predict PLL Reference Spur Levels Due to Leakage Current Michel Azarian and Will Ezell Presented is a simple model that can be used to accurately predict the level of reference spurs due to charge pump and/or op amp leakage ...
[26] Kuan T and Liu S. A Digital Bang-Bang Phase-locked Loop with Automatic Loop Gain Control and Loop Latency Reduction. In: 2015 Symposium on VLSI Circuits (VLSI Circuits); 2015. p. C138–C139. [27] Kuan TK and Liu SI. A Loop Gain Optimization Technique for Integer-N TDC-Based ...
A log frequency display relative to the 2000 MHz fixed reference Integer Boundary was used to emphasize the importance of the loop bandwidth on spurious performance of the fixed reference case. This technique clearly shows the logarithmic roll-off of the worst case spurious when operating near the...
cycle slipping increases 10 LMX2485 Cycle Slip Reduction Technique No Cycle Slip Reduction • Peak Time = 561 uS • Lock Time = 834 uS With Cycle Slip Reduction • Peak Time = 151 uS • Lock Time = 486 uS 11 LMX2531/LMX2541 VCO Tuning Algorithm Reduces Cycle Slipping • Calibrati...
Integer-N PLL operation and nonidealities are important topics in the design of RF systems. Reference spurs can have a significantly negative impact on overall system performance. The simple model provided by Linear Technology accurately predicts reference spur levels due to leakage current in PLLs ...
reference frequency. A non-integer multiple of the reference frequency can also be created by replacing the simple divide-by-N counter in the feedback path with a programmable pulse swallowing counter. This technique is usually referred to as a fractional-N synthesizer or fractional-N PLL.[...
In some parts that use the phase delay compensation technique, it is possible to shut off the compensation circuitry in order to sacrifice reference spur level in order to improve the phase noise. For the Texas Instruments LMX2364, the fractional compensation circuitry can be disabled in order ...