[ 1.242609] QG-K: qg_determine_pon_soc: using SHUTDOWN_SOC @ PON ocv_uv=4010900uV soc=65 [ 1.243555] google_bms: storage registered qg at 1, dupes=0, refs=0 [ 1.243580] QG-K: qpnp_qg_probe: QG initialized! battery_profile=82300199012 SOC=65 QG_subtype=4 QG_version=QG_PMIC5...
XSHUTDOWN = 0 b. XSHUTDOWN = 1 c. XSHUTDOWN = 1 standby initiated by register after XSHUTDOWN releaseb high-z by default input/open drain high-z by default input high-z by default input/open drain high-z by default high-z by default input input high-z by default input high-z ...
6 +919,20 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) irqmask &= ~0x10; pci_write_config_byte(dev, 0x5a, irqmask); + /* + * HPT371 chips physically have only one channel, the secondary one, + * but the primary channel registers do ...