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Cite this paper Azarian, A., Cardoso, J.M.P. (2014). Coarse/Fine-grained Approaches for Pipelining Computing Stages in FPGA-Based Multicore Architectures. In: Lopes, L.,et al.Euro-Par 2014: Parallel Processing Workshops. Euro-Par 2014. Lecture Notes in Computer Science, vol 8806. Springe...
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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1239)) Included in the following conference series: International Workshop on Languages and Compilers for Parallel Computing Abstract Resource-Directed Loop Pipelining (RDLP) is a new approach to loop pipelining that allows ...