< PHY status register Offset */ #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ 二.PHYAutoStrapping 现在的多数PHY都...
speed = mii_reg & YT8512_SPEED_MASK;switch(speed) {caseYT8512_SPEED_1000: phydev->speed = SPEED_1000;break;caseYT8512_SPEED_100: phydev->speed = SPEED_100;break;caseYT8512_SPEED_10: phydev->speed = SPEED_10;break;default: phydev->speed = SPEED_100;break; }return0; }staticintyt...
Offset */ /*!< PHY Link mask */ /*!< PHY Speed mask */ /*!< PHY Duplex mask */ 二．PHY AutoStrapping 现在的多数PHY都具有AutoStrapping功能，即可以在硬件设计时，通过上下拉电阻设定某些引 脚的电平，PHY复位后自动将引脚电平读入指定的寄存器标志位，以相应的方式工作。需要注意的 有以下几项：
Restartauto-negotiationfunction*/*!Selectthepowerdownmode*/*!Auto-Negotiationprocesscompleted*/*!PHYstatusregisterOffset*/*!PHYLinkmask*/*!PHYSpeedmask*/*!PHYDuplexmask*/PHYAutoStrapping现在的多数PHY都具有AutoStrapping功能,即可以在硬件设计时,通过上下拉电阻设定某些引脚的电平,PHY复位后自动 4、将引脚...
|||---dev->speed=SPEED_UNKNOWN |||---dev->duplex=DUPLEX_UNKNOWN |||---dev->pause=0 |||---dev->asym_pause=0 |||---dev->link=1 |||---dev->interface=PHY_INTERFACE_MODE_GMII |||---dev->autoneg=AUTONEG_ENABLE//默认支持自协商 |||---dev...
| pl->phy_state.speed = phydev->speed;// (1) 把 `phy_device` 状态更新给 `phylink` | pl->phy_state.duplex = phydev->duplex; | pl->phy_state.interface = phydev->interface; | pl->phy_state.link = up; | phylink_run_resolve(pl);// (2) 通知 `phylink` 的轮询任务启动 ...
intspeed;// 速度 intduplex;// 双工模式 intpause;// 停止 intasym_pause; intlink; u32 interrupts;// 中断使能标志 u32 supported; u32 advertising; u32 lp_advertising; intautoneg; intlink_timeout; intirq;// 中断号 void*priv;// 私有数据 ...
< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ 二.PHY AutoStrapping 现在的多数 PHY 都具有 AutoStrapping 功能,即可以在硬件设计时,通过上下拉电阻设定某些引脚的电平,PHY 复位后自动将引脚电平读入指定的寄存器标志位,以相应的方式工作。需要注意的有以下...
phydev-> autonet, speed, duplex. 1. MDIO简介 The MDIO interface is a simple, two-wire, serial interface to connect a management entity and a managed PHY for the purposes of controlling the PHY and gathering status from the PHY. The two lines include the MDC line [Management Data Clock]...
#define PHY_AUX_SPEED_MASK GENMASK(4, 2) #define PHY_AUX_CTRL_STATUS 0x1d #define PHY_AUX_DPX_MASK GENMASK(5, 5) #define PHY_AUX_SPEED_MASK GENMASK(4, 2)/* Registers on MDIO_MMD_VEND1 */ #define MTK_PHY_LINK_STATUS_MISC 0xa2 ...