...casePHY_INTERFACE_MODE_RGMII:casePHY_INTERFACE_MODE_RGMII_ID:casePHY_INTERFACE_MODE_RGMII_RXID:casePHY_INTERFACE_MODE_RGMII_TXID:if(eth_clk_sel_reg) value = SYSCFG_PMCSETR_ETH_SEL_RGMII | SYSCFG_PMCSETR_ETH_CLK_SEL;elsevalue = SYSCFG_PMCSETR_ETH_SEL_RGMII; debug("%s: PHY_INTERFA...
int phy_mode; /* Determine if the PHY adds a 2 ns TX delay or the MAC handles it */ phy_mode = device_get_phy_mode(ðqos->pdev->dev); if (phy_mode == PHY_INTERFACE_MODE_RGMII_ID || phy_mode == PHY_INTERFACE_MODE_RGMII_TXID) phase_shift = 0; else phase_shift = RGMII...
phy-mode: string, operation mode of the PHY interface; supported values are “mii”, “gmii”, “sgmii”, “qsgmii”, “tbi”, “rev-mii”, “rmii”, “rgmii”,“rgmii-id”, “rgmii-rxid”, “rgmii-txid”, “rtbi”, “smii”, “xgmii”; this is now a de-facto standard propert...
@@ -55,6 +57,8 @@ static const char * const phy_interface_strings[] = { 5557 [PHY_INTERFACE_MODE_RGMII_RXID]="rgmii-rxid", 5658 [PHY_INTERFACE_MODE_RGMII_TXID]="rgmii-txid", 5759 [PHY_INTERFACE_MODE_RTBI]="rtbi", 60+
PHY_INTERFACE_MODE_RGMII_RXID, PHY_INTERFACE_MODE_RGMII_TXID, PHY_INTERFACE_MODE_RTBI, PHY_INTERFACE_MODE_SMII } enum phy_state { PHY_DOWN =0, PHY_STARTING, PHY_READY, PHY_PENDING, PHY_UP, PHY_AN, PHY_RUNNING, PHY_NOLINK, PHY_FORCING, PHY_CHANGELINK, PHY_HALTED, PHY_RESUMING...
#defineAT803X_DEBUG_SYSTEM_MODE_CTRL0x05 #defineAT803X_DEBUG_RGMII_TX_CLK_DLYBIT(8)MODULE_DESCRIPTION("Atheros803xPHYdriver");MODULE_AUTHOR("MatusUjhelyi");MODULE_LICENSE("GPL");staticintat803x_set_wol(structphy_device*phydev,structethtool_wolinfo*wol){ structnet_device*ndev=phydev...
[PHY_INTERFACE_MODE_TBI] = "tbi",[PHY_INTERFACE_MODE_RMII] = "rmii",[PHY_INTERFACE_MODE_RGMII] = "rgmii",[PHY_INTERFACE_MODE_RGMII_ID] = "rgmii-id",[PHY_INTERFACE_MODE_RGMII_RXID] = "rgmii-rxid",[PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid",[PHY_INTERFACE...
adi,tx-internal-delay-ps: RGMII TX Clock Delay used only when PHY operates in RGMII mode with internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds. Accepted values: 1600, 1800, 2000, 2200, 2400, Default: 2000. adi,fifo-depth-bits: When operating in RMII mode, ...
.interface = PHY_INTERFACE_MODE_SGMII, /* Interfaces can be PHY_INTERFACE_MODE_MII PHY_INTERFACE_MODE_GMII PHY_INTERFACE_MODE_SGMII PHY_INTERFACE_MODE_TBI PHY_INTERFACE_MODE_RMII PHY_INTERFACE_MODE_RGMII PHY_INTERFACE_MODE_RGMII_ID PHY_INTERFACE_MODE_RGMII...
it support mii, gmii, sgmii, tbi, rmii, rgmii,rgmii-id,rgmii-rxid,rgmii-txid,rtbi,xgmii. Would you kindly help us fingure out whether b4860 is support 1000basex or not . If support, how to modify the dts. Thanks. 0 Kudos Reply 04-23-2021 01:00 AM 2,191 Views yipingwang...