第三个度量方法，时间间隔误差(Time Interval Error,简称TIE)抖动，有时也被称作相位抖动(Phase Jitter)...
公开/公告日期: 2007-10-25 申请(专利权)人: FUJITSU LTD 发明人: H Tetsutaro,橋本 鉄太郎 摘要: PROBLEM TO BE SOLVED: To provide a period jitter canceling circuit capable of increasing the timing margin of a data transfer system and accelerating data transfer.收藏...
PROBLEM TO BE SOLVED: To provide a period jitter canceling circuit capable of increasing the timing margin of a data transfer system and accelerating data transfer.HASHIMOTO TETSUTARO橋本 鉄太郎
aClock timing jitter can be measured in time domain and in frequency domain. Cycle−to−cycle jitter, period jitter and time interval error (TIE) jitter are measured in time domain, where as phase noise and phase jitter are measured in frequency domain. Some of the sources of jitter are...
jitter. The solid (black) lines show the inferred full model coming from our multi-GP, light grey shaded areas showing the one and two sigma credible intervals of the corresponding GP model.Lower panels—Phase-folded RV data for planets b (left) and c (right) with best-fit Keplerian ...
A variable attenuator and mechanical phase shifter are used to optimize the microwave gradient for compression. There is no feedback loop. We characterized this passive synchronization scheme with a fibre-loop optical mixer64 and found an integrated jitter of less than 5 fs (s.d.) in the ...
During operation of the computer system2, an RCU updater18may occasionally perform an update to one of the shared data elements16. In accordance with the philosophy of RCU, a first-phase update may be performed in a manner that temporarily preserves a pre-update view of the shared data elem...
PROBLEM TO BE SOLVED: To provide a period jitter canceling circuit capable of increasing the timing margin of a data transfer system and accelerating data transfer. SOLUTION: The period jitter of clock signals CLK_IN is measured by the period jitter measuring circuit 3, the clock signals CLK_IN...
Period jitter cancellation circuit, static phase difference cancellation circuit, period jitter measurement circuit, static phase difference measuring circuit and the phase difference adjustment circuitPROBLEM TO BE SOLVED: To provide a period jitter canceling circuit capable of increasing the timing margin ...
Additional phase contamination in the output signal can be demodulated and used to regulate a level of the baseband signal used during modulation of the input signal. The output signal could have less phase noise or period jitter than the input signal....