(2)填写目标链路速率到Target Link Speed 字段,只有8GT/s及以上速率才会需要EQ (3)将 Link Control Register 的 Retrain Link 位置1 17、均衡成功的标志寄存器 对于8 GT/s,寄存器名称为 Link Status 2 Reister 对于16 GT/s,寄存器名称为 16 GT/s Status Reister 对于32 GT/s,寄存器名称为 32 GT/s Status...
echo"Original link target speed:"$(("0x$lc2"&0xF)) lc2n=$(printf"%08x"$((("0x$lc2"&0xFFFFFFF0) | $speed))) echo"New target link speed:"$speed echo"New link control 2:"$lc2n setpci -s $dev CAP_EXP+30.L=$lc2n echo"Triggering link retraining..."lc=$(setpci -s $dev CAP_...
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- EqualizationPhase2-, EqualizationPhase3-, ...
LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled LnkCtl2: Target Link Speed: 5GT/s,...
软件填写 Link Control 2 Register (图 20)的 Target Link Speed 字段为 8 GT/s 或以上速率。 软件将 Link Control Register (图 21)的 Retrain Link 位置一。 ▲图 19: Link Control 3 Register ▲图 20: Link Control 2 Register ▲图 21: Link Control Register ...
TimeoutDis- LTR- OBFF Disabled,AtomicOpsCtl: ReqEn-LnkCtl2: Target Link Speed: 5GT/s, EnterC...
ASPM not supported, Exit Latency L0s unlimited, L1 unlimited LnkSta: Speed 8GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis- # lspci -s 81:00.0 -vvv | grep PCIeGen [V0] Vendor specific: PCIeGen3...
LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis- Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+, EqualizationPhase1+ EqualizationPhase2+, EqualizationPhase3+, ...
Max Link Speed:选择5.0GT/s 即PCIE2.0 Reference Clock :100MHZ,参考时钟 100M DMA Interface Option:接口选择 AXI4 接口 AXI Data Width:128bit,即 AXI4 数据总线宽度为128bit AXI Clock :125M,即AXI4 接口时钟为125MHZ DMA Interface option 设置为AXI Memory Mapped方式 ...
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- ...