第一种方式为通过iATU_VIEWPORT_OFF寄存器进行间接访问: 实现方式是首先配置 0x700+0x200地址的 (iATU_VIEWPORT_OFF)寄存器,表示设置第N个iATU以及ATU的方式(inbound/outbound);然后设置iATU Lower Base/Upper Base/Ctrl1/Ctrl2 Register等实际配置: #definePCIE_ATU_VIEWPORT0x900#definePCIE_ATU_REGION_INBOUND...
pcie_map_outbound(PCIE_IATU_VIEWPORT_1, TLP_TYPE_MemRdWr, PCIE_ARB_BASE_ADDR, 0x310000, SZ_64K); Here's what the inbound mapping function does: uint32_t pcie_map_inbound_addr(uint32_t viewport, uint32_t tlp_type, uint32_t addr_base_cpu_side, uint32_t addr_base_pcie_side, ui...
num-viewport = <0x8>; nvidia,aspm-cmrt-us = <0x3c>; nvidia,aspm-l0s-entrance-latency-us = <0x3>; nvidia,aspm-pwr-on-t-us = <0x14>; nvidia,bpmp = <0x3 0x1>; nvidia,disable-power-down; nvidia,max-speed = <0x1>; pcie@14100000 { phy-names = "p2u-0"; phys = <0x103...
reg-names = “appl\0atu_dma\0dbi\0addr_space”; nvidia,aspm-l0s-entrance-latency-us = <0x03>; num-ob-windows = <0x08>; resets = <0x03 0x0f 0x03 0x0e>; interrupts = <0x00 0x162 0x04>; clocks = <0x03 0xab>; nvidia,enable-ext-refclk; reset-gpios = <0xe7 0xc1 0x01...
32 0x30000000 0x0 0x10000000>; reg-names = "appl", "config", "atu_dma", "dbi", "ecam"; status = "okay"; #address-cells = <0x3>; #size-cells = <0x2>; device_type = "pci"; num-lanes = <0x8>; num-viewport = <0x8>; linux,pci-domain = <0x7>; clocks = <0x2 0xab...
I check DMA and iATU register definition in below two files. #define DMA_REG_OFFSET 0x970 in drivers/pci/controller/dwc/pci-imx6.c #define PCIE_ATU_VIEWPORT 0x900 in drivers/pci/controller/dwc/pcie-designware.h But I cannot find any description about these two register offset in iMX8MM ...
@@ -538,7 +506,7 @@ static void rk_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, 538 506 } 539 507 540 508 dw_pcie_writel_dbi(pci, PCIE_ATU_VIEWPORT, 541 - PCIE_ATU_REGION_OUTBOUND | index); 509 + PCIE_ATU_REGION_DIR_OB | index); ...
> ++ if (pci->iatu_unroll_enabled) { > ++ dev_err(dev, "Programming ATU for magic not implemented for > this hardware\n"); > ++ return -1; > ++ } > ++ > ++ dw_pcie_writel_dbi(pci, PCIE_ATU_VIEWPORT, > ++ PCIE_ATU_REGION_INBOUND | index); ...
_viewport_cfg0(struct pcie_port *pp, u32 busdev) +{ + u32 val; + void __iomem *dbi_base = pp->dbi_base; + + /* Program viewport 0 : OUTBOUND : CFG0 */ + val = PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0; + writel_rc(pp, val, dbi_base + PCIE_ATU_VIEWPORT);...
pcie_map_outbound(PCIE_IATU_VIEWPORT_1, TLP_TYPE_MemRdWr, PCIE_ARB_BASE_ADDR, 0x310000, SZ_64K); Here's what the inbound mapping function does: uint32_t pcie_map_inbound_addr(uint32_t viewport, uint32_t tlp_type, uint32_t addr_base_cpu_side, uint32_t addr_base_pcie_side, ui...