}/* check whether the latency timer is set correctly */pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_tmr);#ifVERBOSE > SHOW_ERROR_MESSAGESDEBUG(SHOW_TRACING,"latency timer: %x\n", latency_tmr);#endifif(latency_tmr < PCIDEVICE_LATENCY_TIMER_MIN) {/* set the latency timer *...
Sep 23, 2021 Knowledge Title 50633 - AXI Bridge for PCI Express - Root Port Implementation does byte swap to the completion packet for a configuration read issued to an Endpoint device Description Version Found: v1.03a, v1.04a Version Resolved and other Known Issues: see(Xilinx Answer 44969)...
50633 - AXI Bridge for PCI Express - Root Port Implementation does byte swap to the completion packet for a configuration read issued to an Endpoint device Description Version Found: v1.03a, v1.04aVersion Resolved and other Known Issues: see (Xilinx Answer 44969) When operating in Root Port ...