8. request_irq():注册中断服务函数,当中断发生时,系统调用这个函数。 9. pcie_capability_write_dword(..., ..., PCI_EXP_DEVCTL_EXT_TAG):PCI_EXP_DEVCTL_EXT_TAG,标识设备的DevCtl设置了ExtTag+,设置了这个标识位,读请求tlp中requester ID字段会扩展一个8位的tag,表示能暂存数据包的数量,但是需要FPGA ...
static int pci_enable_pcie_error_reporting(struct pci_dev *dev) { int rc; if (!pcie_aer_is_native(dev)) return -EIO; rc = pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_AER_FLAGS); return pcibios_err_to_errno(rc); } ...
integer.value; hpx2->pci_exp_devctl_or = fields[11].integer.value; hpx2->pci_exp_lnkctl_and = fields[12].integer.value; hpx2->pci_exp_lnkctl_or = fields[13].integer.value; hpx2->sec_unc_err_sever_and = fields[14].integer.value; hpx2->sec_unc_err_sever_or = fields[15...
#define PCI_EXP_DEVCAP_PWR_SCL 0xc000000/* Slot Power Limit Scale */ #define PCI_EXP_DEVCAP_FLR 0x10000000/* Function Level Reset */ #define PCI_EXP_DEVCTL 8/* Device Control */ #define PCI_EXP_DEVCTL_CERE 0x0001/* Correctable Error Reporting En. */ ...
PCI_EXP_DEVCTL_RELAX_EN| PCI_EXP_DEVCTL_NOSNOOP_EN,0); pcie_capability_clear_word(root_port,PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN| PCI_EXP_DEVCTL_NOSNOOP_EN); } /* Expand Down 0 comments on commit4afc65c Pleasesign into comment....
#define PCI_EXP_TYPE_PCIE_BRIDGE 0x8 /* PCI/PCI-X to PCIe Bridge */ #define PCI_EXP_DEVCAP 4 /* Device capabilities */ #define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ #define PCI_EXP_DEVCTL 8 /* Device Control */ #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bri...
int readrq = le16_to_cpu(*ctrl) & PCI_EXP_DEVCTL_READRQ;count = vfio_default_config_write(vdev, pos, count, perm, offset, val); if (count < 0) @@ -783,6 +784,27 @@ static int vfio_exp_config_write(struct vfio_pci_device *vdev, int pos,pci...
PCI_EXP_DEVCTL2_LTR_EN); } } #endif return 0; } static void pci_restore_pcie_state(struct pci_dev *dev) @@ -1678,6 +1663,13 @@ static void pci_restore_pcie_state(struct pci_dev *dev) struct pci_cap_saved_state *save_state; u16 *cap; /* * Restore max latencies (in the ...
#define PCI_EXP_TYPE_PCIE_BRIDGE 0x8 /* PCI/PCI-X to PCIe Bridge */ #define PCI_EXP_DEVCAP 4 /* Device capabilities */ #define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ #define PCI_EXP_DEVCTL 8 /* Device Control */ ...
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