Behavioral descriptions in VHDL often take advantage of complexnoperations to describe the behavior of a system in a comprehensive way.nExisting synthesis tools, however, are not able to handle the completenset of operations. A time expansive transformation is required to mapnthe high level ...
Have you taken a look at the templates menu in Quartus II? It has a bunch of arithmetic templates for Verilog and VHDL that might show you how to code those operators to ensure you get what you want. Have a source file open and then go to "Edit" --> "Insert Template" -...