The AFC module234measures the time (for example, measured by the number of clock cycles) between two consecutive pulse occurrences having the same polarity. If there is a positive frequency offset (meaning the distance between the carrier frequency and high tone of the FSK signal is lower than...
The controller 16 can be controlled externally by a central processing unit (CPU), a microprocessor, a digital signal processor (DSP), a computer, or any other processing device known in the art. In the described exemplary embodiment, a control bus 17 provides two way communication between the...
Generally, all terms used herein are to be interpreted according to their ordinary meaning in the relevant technical field, unless a different meaning is clearly given and/or is implied from the context in which it is used. All references to a/an/the element, apparatus, component, means, ste...
unit20and image processing unit24, are included in a computer, computer server, or other microprocessor-based system capable of performing a sequence of logic operations. In addition, processing can be distributed throughout the system with individual portions being implemented in separate system ...
It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Also, in the above Detailed Description, various features may be grouped together to streamline the disclosure. However, the claims may not set forth features disclosed ...
such as the 45 degree view where less than 20 percent of the color seen is black, resulting in a very light gray. Looking directly at surface302(90 degree view), the amount of black visible to the viewer is roughly one third of the total, meaning that white will be seen at about 66...
17.The electronic system of claim 16 wherein the logic function section is a microprocessor. 18.The electronic system of claim 16 wherein the logic function section is a memory controller. 19.The electronic system of claim 16 wherein the logic function section is a bus bridge. ...
meaning that if it does not succeed by the time the data being prefetched is needed by the CPU, the CPU will not consider the condition an error and will continue with operation. However, if the data is not present when the CPU needs it, then the...
See MIKE JOHNSON, SUPERSCALAR MICROPROCESSOR DESIGN, p. 9-24 (1991). An instruction which uses a value computed by a previous instruction has a "true" (or data) dependency on the previous instruction. An example of an output dependency is, in out-of-order completion, where first and ...
In general, the operation of the page printer 20 commences when it receives a page description from the host computer 45 via the I/O port 40 in the form of a print job data stream. The page description is placed in RAM 50 and/or cache 29. The microprocessor 30 accesses the page descr...