This process is completed by pinning the GPU device memory in BAR space by using the nvidia_p2p_get_pages API. If the application tries to pin memory beyond the available BAR space, the nvidia_p2p_get_pages API returns a -12 (ENOMEM) error code. To avoid running out of BAR memory, ...
int nvidia_p2p_get_pages(uint64_t p2p_token, uint32_t va_space_token, uint64_t virtual_address, uint64_t length, struct nvidia_p2p_page_table **page_table, void (*free_callback)(void *data), void *data); int nvidia_p2p_get_pages(u64 virtual_address, u64 length, struct nvidia_...
[ +0.000016] nvidia_fs: Unknown symbol nvidia_p2p_get_pages (err -2) [ +0.000285] nvidia_fs: module using GPL-only symbols uses symbols from proprietary module nvidia. [ +0.000017] nvidia_fs: Unknown symbol nvidia_p2p_put_pages (err -2) [ +0.000284] nvidia_fs: module using GPL-only ...
I then modified the source for nv-p2p.c & nv-p2p.h located here: Linux_for_Tegra/source/public/nvidia_kernel_display_driver_source/kernel-open/ I changed all the exported function names. For example from this: nvidia_p2p_dma_unmap_pages nvidia_p2p_get_pages nvidia_p2p_put_pages nvid...
CONFTEST: get_user_pages CONFTEST: pin_user_pages_remote CONFTEST: pin_user_pages CONFTEST: drm_gem_object_lookup CONFTEST: drm_atomic_state_ref_counting CONFTEST: drm_driver_has_gem_prime_res_obj CONFTEST: drm_atomic_helper_connector_dpms ...
[ConnectX-6 Dx and above] Added a mechanism that safely starts and stops multiple VFIO devices that might do P2P transactions between themselves. Such mechanism didn't exist before, and thus, VFIO migration was allowed only for VMs with a single VFIO device. With this mechanism, this restrict...
I need a dmesg from your jetson “after” you flash the board by sdkmanager. dmesg can only get dumped from a linux PC, either your host PC or jetson… I need the one from jetson… If you cannot flash the board because of some error, then share that error log to us…...
RoCE assigned mlx5_10 as the logical port, which is the same as netdevice p2p1, and both are mapped to physical port of PCI function 0000:84:00.0. • RoCE logical port mlx5_2 of the second PCI card (PCI Bus address 05) and netdevice p5p1 are mapped to physical port of PCI...
_migration_get_data_size CONFTEST: vfio_log_ops CONFTEST: vfio_precopy_info CONFTEST: dom0_kernel_present CONFTEST: nvidia_vgpu_kvm_build CONFTEST: nvidia_grid_build CONFTEST: nvidia_grid_csp_build CONFTEST: get_user_pages CONFTEST: get_user_pages_remote CONFTEST: pin_user_pages CONFTEST: pin...
RoCE assigned mlx5_10 as the logical port, which is the same as netdevice p2p1, and both are mapped to physical port of PCI function 0000:84:00.0. • RoCE logical port mlx5_2 of the second PCI card (PCI Bus address 05) and netdevice p5p1 are mapped to physical port of PCI...