NVIDIA于2020年在IEEE Micro上刊出了一篇题为 “Accelerating Chip Design with Machine Learning”的文章。该文章总结了NV在AI for EDA领域做的研究工作,包括设计空间探索、功耗分析、可布线性预测、模拟芯片设计等,并提出了AI 辅助芯片设计的一些愿景。 以下为原文翻译。原文很长,笔者只翻译了一些关键工作。 由于摩...
NVIDIA于2020年在IEEE Micro上刊出了一篇题为 “Accelerating Chip Design with Machine Learning”的文章。该文章总结了NV在AI for EDA领域做的研究工作,包括设计空间探索、功耗分析、可布线性预测、模拟芯片设计等,并提出了AI 辅助芯片设计的一些愿景。 以下为原文翻译。原文很长,笔者只翻译了一些关键工作。 由于摩...
Nvidia this week told Microsoft, one of its biggest customers, and another large cloud provider about a delay involving the most advanced AI chip in its new Blackwell series of chips, according to a Microsoft employee and another person with direct knowledge. Nvidia unveiled Blackwell in March an...
Nvidia has trained its NeMo large language model (LLM) on internal data to help chip designers with tasks related to chip design, including answering general questions about chip design, summarizing bug documentation, and writing scripts for EDA tools. Nvidia’s chief scientist, Bill Dally, ...
特别是，Nvidia GH200 Superchip有望用于以OpenAI ChatGPT为代表的生成式AI工作负载中，这种生成式AI从提示中生成新内容的能力近乎人类，目前已经席卷了整个科技行业。Nvidia公司加速计算副总裁Ian Buck表示：“生成式AI正在迅速改变企业，释放新的机遇，加速医疗、金融、商业服务和更多行业的发现。随着Grace Hopper ...
Recogni is an AI chip startup that’s creating AI-based vision inference chips for autonomous vehicles. Their vision inference silicon has a combination of power and performance that’s ideal for the automotive market. To design chips in the 5nm to 7nm range, they turned to Cadence’s state...
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Introduction to AI in Chip Design Tutorial | Mark Ren (NVIDIA) Sun, Aug 25| 11:00 a.m.–12:30 p.m. PT Large Language Model (LLM) Agents for Chip Design Tutorial | Mark Ren (NVIDIA) Sun, Aug 25| 1:45–3:15 p.m. PT
Recogni is an AI chip startup that’s creating AI-based vision inference chips for autonomous vehicles. Their vision inference silicon has a combination of power and performance that’s ideal for the automotive market. To design chips in the 5nm to 7nm range, they turned to Cadence’s state...
在AI计算领域基于先进封装Die间互联Chiplet芯粒架构,很可能因为无法满足AI计算领域快速增长的需求而面临“二世而亡”的窘境,业界需要重新寻找旨在提升AI算力的新技术路径,比如SuperChip超级芯片和SuperPOD超节点。因此,类似于NVLink C2C的低时延、高可靠、高密度的芯片间互联技术在未来AI计算芯片的ScaleUp算力扩展中将起到...