This project is a Vivado demo using the Nexys A7-100T's analog-to-digital converter ciruitry, switches, LEDs, and seven-segment display, written in Verilog. When programmed onto the board, voltage levels between 0 and 1 Volt are read off of the JXADC header. The 16 User LEDs increment...
Someone doing this for the first time can probably expand on these notes, I already had a registered xilinx user so probably short-circuited part of the process. Running the SoC The VeeRwolf SoC can be run in simulation or on hardware (Digilent Nexys A7 currently supported). In either case...
Someone doing this for the first time can probably expand on these notes, I already had a registered xilinx user so probably short-circuited part of the process. Running the SoC The VeeRwolf SoC can be run in simulation or on hardware (Digilent Nexys A7 currently supported). In either case...
Vivado is needed to synthesize the design for the nexys A7 target. The standard edition is available free of charge from Xilinx/AMD, but the user needs to register and fill out an export license form. A good place to start is probablyhttps://www.xilinx.com/support/download/index.html/cont...