In terms of bit-vector operations, the algorithm is accelerated by using the massive parallel computing capabilities of a field programmable gate array (FPGA). The system is realized on an embedded platform with a high computational and energy efficiency. Compared to the fastest software ...
In terms of bit-vector operations, the algorithm is accelerated by using the...doi:10.1007/978-3-319-32703-7_104Jrn HoffmannDirk ZeckzerMartin BogdanHoffmann J, Zeckzer D, Bogdan M (2016) Using FPGAs to accel- erate Myers bit-vector algoriththm. In: XIV Mediterranian Conf. Med Biol ...
This research intends to accelerate the pattern matching operation through parallelizing a matching algorithm on a multi-core CPU. In this paper, we parallelize a bit-vector algorithm, Myers algorithm, on a multi-core CPU under the MapReduce framework. On average, we achieve four times speedup ...
We also consider applying 128-bit vector instructions for bit-parallel computations.Kimmo FredrikssonString Processing and Information Retrieval: ProceedingsRow-wise tiling for the myers’ bit-parallel approximate string matching algorithm - Fredriksson - 2003 () Citation Context ...w⌉) time, which ...
The new method is applicable only for small (e.g. DNA) alphabets, but this becomes the fastest algorithm for small m, or moderate k/m. If we want to search multiple patterns in a row, the method becomes attractive for large alphabet sizes too. We also consider applying 128-bit vector ...