数据: Triple 2:1 High-Speed Video Multiplexer 数据表 描述 OPA3875采用小型SSOP-16封装,提供超宽带,3通道,2:1多路复用器。 OPA3875仅使用11mA /ch,提供3个+2增益视频放大器通道,大信号带宽大于400MHz(4V PP )。与使用新的(专利)输入级开关方法的早期解决方案相比,增益精度和开关毛刺得到改善。该技术使用...
to translate inputs from a maximum of 5.5 V down to the VCC Level • Latch-up performance exceeds 100 mA per JESD 78, Class II • ESD Protection exceeds JESD 22 – 2000-V Human body model (A114-A) – 1000-V Charged-device model (C101) 3 Description This single 2-line to 1-...
Therein, the bit rate of the output stream can be up to 216Mbps. For the application area, this device Is especially applicable to the FTA (Free to Air) system multiplexing.Features 1. Fully complying with ISO13818 and EN300 468 standard 2. Integrated ...
HT TC-200GTB-Tri-2 wire function G.SHDSL bis MODEM LAN router line port 2 wire User port 1 E1 + V.35 +Eth + RS 232 OEM DLINK ZTE WRI TAIWAN speed 5.7M to 192K bps distance 4~11Km Packaging and delivery Packaging Details carton Selling Units: Single item Single package size: 55...
Digital Headend 24 Channels HD Encoder Modulator US$400.00-2,300.00 / Piece Low Voltage Aerial Suspension ABC Cable Clamp US$0.55-2.98 / Piece 16 Channel Tuner to IP Gateway DVB-C/T/T2 DVB-S/S2/S2X ISDB-T ATSC Digital Headend IPTV Gateway US$1,150.00-1,...
Problem 60 : 2-to-1 multiplexer (Mux2to1) Problem 61 : 2-to-1 bus multiplexer (Mux2to1v) 信号从单比特宽度变成总线信号, Problem 62 : 9-to-1 multiplexer (Mux9to1v) 错误代码2:没有default,看清题意好不好,说了default的情况了。 正确代码3 Problem 63 : 256-to-1 multiplexer (Mux256to...
This ensures that the LTC4306 does not try to function until it has sufficient bias voltage. When ENABLE is brought below 1V, the LTC4306 is reset to its default high-impedance state and ignores any attempts at communication on its 2-wire buses. When ENABLE is brought back ...
The cross angles of the intersecting waveguides are designed to be larger than 30° so as to make the crosstalk and insertion loss negligible. When the double-gate switch is “off,” the demultiplexed light by AWG1 (AWG2) goes to the cross arm and is multiplexed again by the AWG3 (AWG...
The invention relates to a 2:1 multiplexer of an SET/MOS (Single Electron Transistor/Metal oxide Semiconductor) hybrid structure based on threshold logic. A circuit of the multiplexer is composed by only two threshold logic gates and an inverter and consumes three PMOS (P-channel Metal Oxide ...
2:1, Differential-to-3.3V Dual LVPECL/ECL Clock Multiplexer 85356 DATA SHEET General Description The 85356 is a dual 2:1 Differential-to-LVPECL Multiplexer. The device has both common select and individual select inputs. When COM_SEL is logic High, the CLKxx input pairs will be passed to...