Efficient implementation of 16-bit Multiplier- accumulator using radix-2 modified booth algorithm and spst adder using verilog. by addanki purna ramesh, Dr.a.v. n. tilak and Dr.a.m.prasad, international journal of vlsi design & communication systems (vlsics) vol.3, no.3, june 2012...
Efficient implementation of 16-bit Multiplier- accumulator using radix-2 modified booth algorithm and spst adder using verilog. by addanki purna ramesh, Dr.a.v. n. tilak and Dr.a.m.prasad, international journal of vlsi design & communication systems (vlsics) vol.3, no.3, june 2012...