的MMCME2_ADVcomp rd_pll_u /mmcm_adv_inst的CLKIN1引脚上的信号clk_50mhz必须由具有时钟功能的IOB驱动,而不干预非IO组件。 错误 wywrtswe2020-08-21 09:16:28 次优放置错误 /mmcm_adv_inst(MMCME2_ADV.CLKIN1)上述错误可能与其他连接的实例有关。以下是所有相关时钟规则及其各自实例的列表。时钟规则:rul...
[Timing 38-1] DLL output pin(s) used on clock modifying cell clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst without a feedback net: CLKOUT0 CLKOUT1 What is the issue here and how can I correct it? Solution The reason for the critical warning is that there is no connection for the ...
50821 - 14.7 ERROR:LIT:667 - Block 'MMCM_ADV symbol "physical_group_u_pll_test1/clkfbout/u_pll_test1/mmcm_adv_inst" has its target frequency, FVCO, out of range. Description At the MAP stage, I am receiving the following error with my design: ...