(ASIP)corewithitsembeddedlogic.1.IntroductionOneofthemostimportanttasksduringthedesignofaHW/SWsystemisitsvalidation.Inthesesystems,thehardwareportionisusuallyvalidatedwithsimulatorssupportingconventionalhardwaredescriptionlanguage(HDL)–suchasVHDL[3]andVerilogHDL[4]–whereasthesoftwareportionisvalidatedinabehavioralmodel...