1. Fkanzhunamiliar with SERDES /DDR4, DDR5 /PCIE /DLL data path, IO design来自BOSS直聘, c直聘ritical timing path. 2. Familiar with HSPICE/SpectreBOSS直聘/Virtuoso/XA tool, ableto work independently 职位详情 上海 5-10年 本科 FPGA开发 ...
1. Familiar with SERDES /DDR4, DDR5/PCIE /DLL data path, IO design, critical timing path. 2. Familiar with HSPICE/Spectre/Virtuoso/XA tool, able towork independenbosstly 职位详情 上海 5-10年 本科 半导体技术 IC验证 电路设计 Cadence ...