with an IC like the one you sent, but I choosed that one because it removes esd up to +/-30 KV but the problem here is in the negative side the IO pin of FPGA is exposed to a voltage equal to -4 volt for a time not less than 200 nano second, so we think it may da...
It's still a pretty bad idea for a product subject to any kind of certification. Semiconductor devices are rarely certified to withstand repeated ESD abuse, and transistors often lack upper rating for breakdown voltage, which means that some devices will fail early, and others may experience volt...