In this way, the operation of the interpreter may be interleaved with the operation of the wireless interface controller on a single microprocessor. Such an arrangement allows the interpreter to run on the microcontroller without negatively affecting the wireless interface performance of the ...
(in more details) 2.1 High-Performance and Low-Power 8051-Compatible Microcontroller Optimized 8051 core which typically gives 8x the performance of a standard 8051 Two data pointers In-circuit interactive debugging is supported by the IAR Embedded Workbench through a simple two-wire serial interface...
The input data is processed according to one of data processing methods to achieve the data processed in different data formats, where the data in various formats are stored (514) in the memory regions. Independent claims are also included for the following: (1) a microcontroller (2) a ...
24. A method of selectively interfacing a multi-level cell (MLC) dual-personality extended External Serial Advanced Technology Attachment (eSATA) flash drive to a host comprising: Providing a top row of four USB contact fingers of MLC dual-personality extended eSATA plug connector that is removab...
I/O Interface. INTRO TO I/O INTERFACE I/O instructions (IN, INS, OUT, and OUTS) are explained. Also isolated (direct or I/O mapped I/O) and memory-mapped. The Principle and Application of Microcontrollers Kustanto,S.T.,M.EngECE/CS-352: Embedded Microcontroller Systems Embedded Systems...
6385667System for configuring a flash memory card with enhanced operating mode detection and user-friendly interfacing system2002-05-07Estakhri et al. 6370603Configurable universal serial bus (USB) controller implemented on a single integrated circuit (IC) chip with media access control (MAC)2002-04-...
A microcontroller down-loadable memory organization supporting "shadow" personality, optimized for connecting a computer system to an ISDN network to facilitate transmitting and receiving of data, the
microprocessor or microcontroller, for example, an 8051, 8052, or 80286 Intel® microprocessor, or ARM®, MIPS® or other equivalent digital signal processor. The processing unit and the I/O interface circuit may be made in a single integrated circuit, for application specific integrated ...
wherein the first and second NVMD controller each comprise:a logic circuit for interfacing to the internal bus;a flash channel interface for channeling flash commands generated in response to one of the concurrent requests;wherein the first and second NVMD each comprise:a memory interface, ...