The present invention is particularly directed to the enabling of a refresh cycle for a dynamic memory chip at a period in the fetch cycle, for example, of a type 8085 microprocessor, when the normal timing of the chip does not permit addressing of the memory. Specifically, in the fetch ...
The present invention is particularly directed to the enabling of a refresh cycle for a dynamic memory chip at a period in the fetch cycle, for example, of a type 8085 microprocessor, when the normal timing of the chip does not permit addressing of the memory. Specifically, in the fetch ...