I found that at Apr 17 2016, a kernel patch change of_mdiobus_register_{device|phy} from return "int" to "void", so I guess in the maintainer's opinion register phy should always success, in the contrast it is the responsible for fec driver to avoid kernel panic when n...
MDIOBUS_RELEASED&& /* for compatibility with error handling in drivers */ bus->state!=MDIOBUS_ALLOCATED, "%s: not in RELEASED or ALLOCATED state\n", bus->id); if(bus->state==MDIOBUS_RELEASED) fwnode_handle_put(dev_fwnode(d)); ...
PHY 0:1C not found [ 2.669189] net eth0: CPSW phy found : id is : 0x1410e20 [ 31.668792] PHY: 0:10 - Link is Up - 100/Full -in the call to bus_find_device_by_name(&mdio_bus_type, NULL, bus_id); what is mdio_bus_type ? is it of type mii_bus and the device is ...
and there is no need for this. We only want to gain access to the phys using mdio. As written in my first post. The are even found by davinci-mdio-bus. But we get driver unknown error. So the question I have at the moment...
Found the problem - apparently SGMIIx_KX must be set for the SERDES lane in PCC8 (i.e. KX mode instead of SGMII, cf. reference manual 26.4.1.34) to make device 3/7/30 MDIO registers accessible: => mii device mdio@8c37000 => echo SERDES2@1eb0000, lane G/6=DPMAC...
The designware eth driver registers an mdio bus during probe, but if no PHY is found, this bus is never removed although probe failes and the driver is shown as not probed in the dm tree. This later leads to errors when e.g. the mii or mdio commands try to use available mdio buse...
Managementinterface用于MAC层芯片控制和配置phy设备,而ieee 802.3中规定了phydevice寄存器的额地址空间为5位,最多可定义32各寄存器,而ieee 802.3...命令的交互) 其实mdio子模块也是比较简单的,只涉及到寄存器的读写操作(借助mii_bus提供的方法),理解起来也相对简单点。 本篇主要是简要介绍mdio驱动模型,让大家有一个...
struct mii_dev *mdio_bus; }; int eth_phy_binds_nodes(struct udevice *eth_dev) { ofnode mdio_node, phy_node; const char *node_name; int ret; mdio_node = dev_read_subnode(eth_dev, "mdio"); if (!ofnode_valid(mdio_node)) { debug("%s: %s mdio subnode not found!", __func...
But we are not interested the MDIO bus. Our problem is the link speed. We have been tried all NVM images that we are found but link speed is always 1G not 10G. Could you please also share the solution with me? Best Regards Deniz Kaya 0 Kudos Copy link Reply CarlosAM_INTEL ...
mdiobus_register_board_info(archer_c7_mdio0_info, ARRAY_SIZE(archer_c7_mdio0_info));ath79_register_mdio(0,0x0); ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);/* GMAC0 is connected to the RMGII interface */ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ...