Parameter Symbol Min Max Unit Test conditions Simple SPI tSPcyc 4 (PCLKA ≤ 60 MHz) 8 (PCLKA > 60 MHz) 65536 tPcyc Figure 2.45 SCK clock cycle input (slave) - 6 (PCLKA ≤ 60 MHz) 12 (PCLKA > 60 MHz) 65536 SCK clock high pulse width tSPCKWH 0.4 0.6 tSPcyc SCK clock low ...
The color formats from the inputs are converted to the internal format on read and a conversion back is made on write. See section 56, 2D Drawing Engine (DRW) in User’s Manual. JPEG codec The JPEG incorporates a JPEG codec that conforms to the JPEG baseline compression and decompression ...