we show that symmetry can frequently be used to reduce the size of the state space that must be explored during model checking. In the past, symmetry has been exploited in computing the set of reachable states o
The first step in establishing equivalence is to map all the key points between the two circuits. The inputs of the two circuits are mapped in such a way that they are driven by the same variables and values for the analysis. The outputs of the two circuits would have to be equal forma...
State minimization [Kohavi 1978], state encoding [Villa 1997], and logic minimization using unreachable states or state equivalence [Kohavi 1978] as don't cares, for example, are valid transformation methods because they do not change the input-output behavior of a sequential circuit. Furthermore...
Since O is an equivalence relation, these unique representatives can be computed using BDDs by the method of Lin [15]. Assuming that we have the BDD representation of the map- ping function g, the transition relation Rc of the quotient structure can be expressed as follows: -~a(=, y) ...
CMOSLogic cellCell characterizationCircuit simulatorEquivalence checkVector generationWe have developed a CMOS logic cell characterization tool named CCTomato(Cell Characterizer like a Tomato). In this paper, we show its system configuration, the functions, how we reduced manual work and circuit ...
State minimization [Kohavi 1978], state encoding [Villa 1997], and logic minimization using unreachable states or state equivalence [Kohavi 1978] as don't cares, for example, are valid transformation methods because they do not change the input-output behavior of a sequential circuit. Furthermore...
(or model checking), in which the property of the design is checked against some presumed “properties” specified in the functional or behavioral model (e.g., a finite-state machine should not enter a certain state), and equivalence checking, in which the functionality is checked against a ...
Future work will include: • developing extended libraries of components and design structures • equivalence checking between different levels of description • analysing performance issues • validating timing constraints • investigating automatic derivation of tests from descriptions • studying ...
detector which has the ALU output as its input. The present invention does not require that in all cases the result register be physically distinguished from the operand registers, but does require that the inputs are operands rather than the result for which equivalence to zero is to be ...
A theorem prover is then used to establish the equivalence between the structural specification and the behavioral description to formally verify the design as represented by the data base. This approach has the disadvantages of translating a HDL description of a design into first order clauses and...