下面的时钟结点中clock-cells为1,代表能够输出多路时钟,这里面我们可以看出它提供了两路时钟分别是PLL_PPLL和FCLK_CM0S_SRC_PMU,时钟频率分别是67.6MHz和97MHz。 pmucru:pmu-clock-controller@ff750000{...#clock-cells = <1>;#reset-cells = <1>;assigned-clocks=<&pmucruPLL_PPLL>,<&pmucruFCLK_CM0S_...
这样的配置可以在设备树节点中,通过assigned-clocks,assigned-clock-parents和assigned-clock-rates属性指定。assigned-clock-parents属性应该以phandle和时钟指示符对的形式包含父时钟的列表,assigned-clock-rates属性应该包含一个以 Hz 为单位的频率的列表。这两个属性应该对应于assigned-clocks属性中列出的时钟。 若要跳过...
pinctrl-0 = <&pinctrl_sai2>; assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>, <&clks IMX6UL_CLK_SAI2>; assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; assigned-clock-rates = <0>, <12288000>; status = "okay"; }; pinctrl_sai2: sai2grp { fsl,pins = < MX6UL...
assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>, <&clks IMX6UL_CLK_SAI1>; assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; assigned-clock-rates = <0>, <24576000>; status ="disabled"; }; &mqs { pinctrl-names ="default"; pinctrl-0 = <&pinctrl_mqs>; clocks = <&...
{compatible="simple-bus";...};...};&cpu0{arm-supply=< _arm>;soc-supply=< _soc>;dc-supply=< _gpio_dvfs>;};&clks{assigned-clocks=<&clksIMX6UL_CLK_PLL4_AUDIO_DIV>;assigned-clock-rates=<786432000>;};...&wdog1{pinctrl-names="default";pinctrl-0=<&pinctrl_wdog>;fsl,wdog_b;}...
assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; assigned-clock-rates = <786432000>; }; ... &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; fsl,wdog_b; }; 1. 2. 3. 4. 5. 6. 7. 8. 9.
{ //音频编译码器 #sound-dai-cells = <0>; compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; clocks = <&cru I2S1_MCLKOUT_TX>; clock-names = "mclk"; assigned-clocks = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLK_TX_IOE>; assigned-clock-rates = <12288000>; assigne...
assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>, <&clks IMX6UL_CLK_SAI2>; assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; assigned-clock-rates = <0>, <12288000>; status = "okay"; }; pinctrl_sai2: sai2grp { ...
assigned-clocks = <&cru ARMCLKL>, <&cru ARMCLKB>,<&cru PLL_NPLL>, <&cru PLL_CPLL>,<...
assigned-clocks=<&cru SCLK_TSADC>;assigned-clock-rates=<750000>;## TS-ADC工作时钟为750000clocks=<&cru SCLK_TSADC>,<&cru PCLK_TSADC>;clock-names="tsadc","apb_pclk";## TS-ADC模块的两个时钟:工作时钟和配置时钟 resets=<&cru SRST_TSADC>;reset-names="tsadc-apb";rockchip,grf=<&grf>...