LDD(Lightly Doped Drain),即轻掺杂漏极,是一种特殊的MOSFET结构设计,是在减少热载流子效应。在MOSFET中,源极和漏极都是高度掺杂的区域,这会在靠近沟道的地方产生较高的电场强度,导致热载流子注入现象,会损害栅极绝缘层,从而缩短器件寿命并降低可靠性。LDD结构通过引入一层薄而低浓度的掺杂区来缓解这一问题。 LDD ...
The invention relates to a MOS transistor structure which displaces the current path in the drain zone from the surface to deep within. In the embodiment according to the invention a deflection zone is arranged in the drain region below the drain spacer. In another embodiment, a deflection ...
LIGHTLY DOPED DRAIN (LDD) MOSFET 专利名称：LIGHTLY DOPED DRAIN (LDD) MOSFET 发明人：TIHANYI, Jenö 申请号：DE1997000719 申请日：19970409 公开号：WO97/041604P1 公开日：19971106 专利内容由知识产权出版社提供 摘要：The invention relates to a MOS transistor structure which displaces the current path ...
6) lightly doped drain (LDD) 轻掺杂漏(LDD)补充资料:“质子-电子偶极-偶极”质子弛豫增强 “质子-电子偶极-偶极”质子弛豫增强 物理学术语。 原子核外层中不成对的电子质量小,但磁动性很强,可使局部磁场波动增强,促使氢质子弛豫加快,从而使T1和T2缩短,这种效应即为PEDDPRE。过渡元素和镧系元素大部分在d和...
Practical, Theoretical or Mathematical, Experimental/ capacitance MOSFET semiconductor device models semiconductor device reliability/ cut off frequency transit time analysis lightly doped drain MOSFETs transconductance fringing capacitance series resistance closed form expression total gate capacitance geometric capaci...
2) Boron light doped 硼轻掺杂 3) low concentration doping 轻微掺杂 4) LDD MOSFET 轻掺杂漏MOSFET 5) lightly doped drain(LDD) 轻掺杂漏区 6) lightly doped drain 轻掺杂漏极 补充资料:轻言轻语 1.形容说话声音极轻微。 说明:补充资料仅用于学习参考,请勿用于其它任何用途。
A new deep submicron I-V model for lightly-doped drain (LDD) and single-drain (SD) metal-oxide-semiconductor-field-effect-transistors (MOSFET) is presented. The physics-based and analytical model is developed using the drift-diffusion equation with a modified mobility formula to consider the eff...
The hot-carrier degradation of lightly doped drain nMOSFETs is studied in detail. The degradation proceeds in a two-stage mechanism, involving first a series resistance increase and saturation, followed by a carrier mobility reduction. The degradation behaviour of a characteristic MOSFET parameter is ...
4744859Process for fabricating lightly doped drain MOS devices1988-05-17Hu et al.437/41 4735680Method for the self-aligned silicide formation in IC fabrication1988-04-05Yen437/41 4728617Method of fabricating a MOSFET with graded source and drain regions1988-03-01Woo et al.437/44 ...
Design for suppression of gate-induced drain leakage in LDD MOSFETs using a quasi-two-dimensional analytical model Parke, S.A.,Moon, J.E. - 《Electron Devices IEEE Transactions on》 - 1992 - 被引量: 167 Method of...