ldo设计与温漂校准研究
The simulation results show that the input voltage is 5 V, the output voltage is adjustable in the range of 1~4.2 V, the voltage output line regulation rate(LNR) is 8.2 mV/V, the load regulation rate(LDR) is 83.3 μV/mA, the output noise voltage in the range of 1 kHz～100 kHz ...
The line regulation is 1.244mV/V at 1.8V, load regulation is 40.6mV/A. This circuit finds its beneficial behavior for chip-level power management units requiring high-area efficiency as compensation capacitors are avoided. 展开 关键词: low-quiescent current High slew rate low-dropout regulator ...
simulation,physicallayout,post-simulationtape-outandchiptest.Thechipareais400umx650um.TheresultsshowthattheproposedLDOhasthefollowingcharacteristics:theoperatingvoltageis3.5V～6.5Vtheoutputvoltageis3.3Vthedropoutvoltageis200mVwhenitprovideslOOmAloadcurrent themaxovershootofoutputvoltageisaboutlOOmVthelineregulation...
finallylayoutdesignisfinishedandreadytotapeout.Thispaperproposesasolutiontothestructureoftheexternalcapacitor.1essLDOregulator.Removingthelargeoff-chipoutputcapacitorreducestheboardrealestateandtheoverallcostofthedesignandmakesitsuitableforSoCdesigns.Thesimulationresultsshowedthatduringthe0・lOOmAloadcurrentrange.theck...
The simulation results show that under different load currents, the minimum phase margin of the LDO loop is 52 degrees, PSRR can reach 85 dB at 1 kHz, the line regulation is 0. 01% / V, and the load regulation is 0. 4 mV.茅欣彧...
Behavioral level simulations of LDO voltage regulator and phase locked loop(PLL) are performed with CPPSIM, a behavioral-level simulation tool based on C language. The validity of the simulation tool is examined by modeling analog circui... JS Han 被引量: 0发表: 2008年 加载更多来源...
Simulation results have shown that the LDO can be stable for a load capacitance ranging from 0 to 80pF. The line regulation and load regulation are 3.3mV/V and 62uV/mA, respectively, and the quiescent current consumption is only 27uA. Under maximum load current changes, the overshoots and...
From the simulation results, the LDO showed high stability with phase margin > 60 degree at every case. Moreover, the load and line regulation also met the design specifications. ELECTRICAL and ELECTRONIC ENGINEERING 展开 年份: 2010 收藏 引用 批量引用 报错 分享 ...
Simulation tools can also be employed for more precise evaluations. 5. Common Circuit Configurations: Depending on the application requirements, different capacitor configurations can be implemented. These include series, parallel, or a combination of capacitors to achieve the desired capacitance value and...