intz_clock_driver_init(struct device *device){externintz_clock_hw_cycles_per_sec;u32_thz;IRQ_CONNECT(CONFIG_HPET_TIMER_IRQ, CONFIG_HPET_TIMER_IRQ_PRIORITY, hpet_isr,0,0); set_timer0_irq(CONFIG_HPET_TIMER_IRQ); irq_enable(CONFIG_HPET_TIMER_IRQ);/* CLK_PERIOD_REG is in femtoseconds ...
sysbus_mmio_get_region(gicbusdev,0));/* Wire up the interrupt from each watchdog and timer. * For each core the timer is PPI 29 and the watchdog PPI 30. */for(i =0; i < s->num_cpu; i++) {intppibase = (s->num_irq -32) + i *32;sysbus_connect_irq(timerbusdev, i, ...
#define XPAR_FABRIC_AXI_TIMER_0_INTERRUPT_INTR 89 The connection between PL and PS is as below. PL PS IRQ_F2P[0] - IRQ_F2P[15] ID#91 IRQ_F2P[1:0] - IRQ_F2P[15:14] ID#91:90 IRQ_F2P[2:0] - IRQ_F2P[15:13] ID#91:89 ...
I am connecting three interrupt signals from PL to PS IRQ_F2P[15:8]. The Port tab in XPS shows the IRQ bits as follows: IRQ_F2P[2:0] MHS setting: PORT IRQ_F2P = GPIO_SW_IP2INTC_Irpt & LEDs_4Bits_IP2INTC_Irpt & axi_timer_0_Interrupt ...
irq_enable(CMSDK_APB_TIMER_1_IRQ); } 开发者ID:01org,项目名称:zephyr,代码行数:7,代码来源:timer_tmr_cmsdk_apb.c 示例12: nrf5_config ▲点赞 1▼ staticvoidnrf5_config(struct device *dev){ ARG_UNUSED(dev);IRQ_CONNECT(NRF5_IRQ_RADIO_IRQn,0, nrf5_radio_irq,NULL,0); ...