its_set_affinity函数在irq-gic-v3-its.c:还会调用irq_data_update_effective_affinity设置活动affinity。代表当前是那个核来接受中断。 [root@localhost ~]# cat /proc/irq/57/smp_affinity_list 1,3,6 [root@localhost ~]# cat /proc/irq/57/effective_affinity_list 3 1. 2. 3. 4. 5....
when i set irq for my Ethernet cannot be effective. (irq from 99-119) $ sudo cat /proc/irq/109/smp_affinity 00,00000400 $ sudo sh -c "echo 0 > /proc/irq/109/smp_affinity" $ sudo cat /proc/irq/109/smp_affinity 00,00000400 i want to set all ethernet irq to bind with cpu0. ...
.depth = 1, .lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock), } }; int __init early_irq_init(void) { int count, i, node = first_online_node; struct irq_desc *desc; init_irq_default_affinity(); printk
lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock), } }; int __init early_irq_init(void) { int count, i, node = first_online_node; struct irq_desc *desc; init_irq_default_affinity(); printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS); desc = irq_desc; count = ARRAY_SIZE(irq_desc...
irqchip/riscv-imsic: Fix boot time update effective affinity warning Apr 14, 2024 irq-riscv-imsic-state.c irqchip: Add RISC-V incoming MSI controller early driver Mar 26, 2024 irq-riscv-imsic-state.h irqchip/riscv-imsic: Add device MSI domain support for platform devices Mar 26, 20...
AFFINITY-IRQs EFFECTIVE-IRQs > > 0 224 201 > > 1 52 43 > > 2 97 78 > > 4 12 11 > > 6 12 11 > > 8 13 12 > > 10 6 5 > > 12 12 11 > > 14 12 11 > > 16 13 12 > > 18 13 12 > > 20 234 201 > > 21 52 42 > > 22 81 68 > > > > ~# irqstat -c ...
[cpu], reg); irq_data_update_effective_affinity(d, cpumask_of(cpu)); return IRQ_SET_MASK_OK_DONE; diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index a6f97fa6ff69..8017f6d32d52 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/...
wq_update_unbound_numawq_update_unbound_numa - update NUMA affinity of a wq for CPU hot[un]plug*@wq: the target workqueue*@cpu: the CPU coming up or going down*@online: whether @cpu is coming up or going down* This function is to be called from %CPU_DOWN_PREPARE, %CPU_ONLINE ...
*/ void irq_set_thread_affinity(struct irq_desc *desc) { struct irqaction *action; for_each_action_of_desc(desc, action) if (action->thread) set_bit(IRQTF_AFFINITY, &action->thread_flags); } #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK static void irq_validate_effective_affinity(struct...
The purpose of irqbalance is to distribute interrupts accross cpus in an smp system such that cache-domain affinity is maximized for each irq. In other words, irqbalance tries to assign irqs to cpu cores such that each irq stands a greater chance of having its interrupt handler be in cache...