irq_domain_set_info(d, irq, hw, chip, d->host_data, handle_percpu_devid_irq, NULL, NULL); break; case SPI_RANGE: case ESPI_RANGE: irq_domain_set_info(d, irq, hw, chip, d->host_data, handle_fasteoi_irq, NULL, NULL); irq_set_probe(irq); irqd_set_single_target(irqd); br...
host_data是msi_domain_info(ops:its_msi_domain_ops) irq_domain_ops是its_domain_ops . 参考:its_probe_one->its_init_domain函数 [ 0.000000] ===__irq_domain_add domain ffff8020c0030500 name irqchip@(___ptrr val___) === [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.19...
首先从PCI-MSI这个角度来分析,查阅Linux的相关文档,MSI需要分配vector,而这个vector相当于GICv3里面的SPI INTID,而这个分配工作应该是由MSI的irq_domain来负责,那么在目前的ARM平台当中,已知的MSI相关的IRQ domain如下, static const struct irq_domain_ops gicv2m_domain_ops = { .alloc = gicv2m_irq_domain_a...
err = iommu_dma_prepare_msi(info->desc, v2m->res.start + V2M_MSI_SETSPI_NS); gicv2m_get_msi_addr(v2m, hwirq)); if (err) return err; Expand Down Expand Up @@ -304,7 +316,7 @@ static int gicv2m_allocate_domains(struct irq_domain *parent) static int __init gicv2m_init...
irq_domain_set_info(domain, virq, virq, &uv_irq_chip, chip_data, handle_percpu_irq,NULL, info->uv_name); }else{ kfree(chip_data); }returnret; } 开发者ID:EMFPGA,项目名称:linux_media,代码行数:33,代码来源:uv_irq.c 示例2: db1300_device_init ...
ARRAY_SIZE(n8x0_i2c_board_info_3)); platform_device_register(&n8x0_cbus_device); } 开发者ID:4atty,项目名称:linux,代码行数:12,代码来源:board-n8x0.c 示例3: hi6401_irq_map ▲点赞 5▼ staticinthi6401_irq_map(struct irq_domain *d,unsignedintvirq,irq_hw_number_thw){structhi6401_...
irq_set_chip_data(irq, max8997); irq_set_chip_and_handler(irq, &max8997_irq_chip, handle_edge_irq); irq_set_nested_thread(irq, 1); irq_set_noprobe(irq); return 0; } static const struct irq_domain_ops max8997_irq_domain_ops = { .map = max8997_irq_domain_map, }; int max89...
DMA_TRANSFER_INFO_V1構造 DMA_TRANSFER_INFO_V2構造体 DOMAIN_CONFIGURATION構造体 DOMAIN_CONFIGURATION_ARCH列挙 DOMAIN_CONFIGURATION_ARM64構造体 DOMAIN_CONFIGURATION_X64構造体 コールバック関数DRIVER_ADD_DEVICE コールバック関数DRIVER_CANCEL コールバック関数DRIVER_CONTROL コールバック関数DRIVER_DISPATCH...
initializes a topo_obj of type OBJ_TYPE_CPU. topo_obj.mask is set to the bitmask of this CPU and topo_obj.number is set to the number of this CPU. For banned CPUs the allocated topo_obj is freed but for unbanned CPUs we proceed further and add this CPU to cache_domain and ...
hwirq_base, &gic_irq_domain_ops, gic); | ops->map(domain, irq, hwirq); / * call struct irq_domain_ops gic_irq_domain_ops, .map = gic_irq_domain_map set desc->handle_irq = handle; / * high level irq-events handler */ 如果是SPI中断,set desc->handle_irq:handle_fasteoi_irq(...