ret = irq_alloc_domain_generic_chips(nvic_irq_domain,32,1,"nvic_irq", handle_fasteoi_irq, clr,0, IRQ_GC_INIT_MASK_CACHE);if(ret) { pr_warn("Failed to allocate irq chips\n"); irq_domain_remove(nvic_irq_domain);returnret; }for(i =0; i < numbanks; ++i) {structirq_chip_gene...
&irq_generic_chip_ops, priv); if (!domain) { pr_err("loongson-liointc: cannot add IRQ domain\n"); err = -EINVAL; goto out_iounmap_isr; goto out_iounmap; }err = irq_alloc_domain_generic_chips(domain, 32, 1, node->full_name, handle_level_irq, ...
&irq_generic_chip_ops, fic); if (!fic->domain) { pr_err("fail to add irq domain\n"); return -ENOMEM; } ret = irq_alloc_domain_generic_chips(fic->domain, NR_FIC_IRQS, 1, fic->name, handle_level_irq, 0, 0, IRQ_GC_INIT_MASK_CACHE); if (ret) { pr_err("fail to alloca...
对成员进行初始化282desc[i].kstat_irqs=alloc_percpu(unsignedint);283alloc_masks(&desc[i],GFP_K...
kstat_irqs = alloc_percpu(unsigned int); 283 alloc_masks(&desc[i], GFP_KERNEL, node); 284 raw_spin_lock_init(&desc[i].lock); 285 lockdep_set_class(&desc[i].lock, &irq_desc_lock_class); 286 desc_set_defaults(i, &desc[i], node, NULL); 287 } 288 return arch_early_irq_...
*/ nr_irqs = readl_relaxed(hip04_data.dist_base + GIC_DIST_CTR) & 0x1f; nr_irqs = (nr_irqs + 1) * 32; if (nr_irqs > HIP04_MAX_IRQS) nr_irqs = HIP04_MAX_IRQS; hip04_data.nr_irqs = nr_irqs; irq_base = irq_alloc_descs(-1, 0, nr_irqs, numa_node_id()); if ...
+ bus = devm_mdiobus_alloc(dev); + if (!bus) + return -ENOMEM; + + ds->slave_mii_bus = bus; + bus->priv = priv; + bus->name = KBUILD_MODNAME "-mii"; + snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d", idx++); + bus->read = mt753x_phy_read; + bus->...
interval_tree_generic.h io-64-nonatomic-hi-lo.h io-64-nonatomic-lo-hi.h io-mapping.h io.h ioc3.h ioc4.h iocontext.h iomap.h iommu-common.h iommu-helper.h iommu.h iopoll.h ioport.h ioprio.h iova.h ip.h ipack.h ipc.h ipc_namespace.h ipmi-fru.h ipmi.h ipmi_smi....
if (!fic->domain) { pr_err("fail to add irq domain\n"); return -ENOMEM; } ret = irq_alloc_domain_generic_chips(fic->domain, NR_FIC_IRQS, 1, fic->name, handle_level_irq, 0, 0, IRQ_GC_INIT_MASK_CACHE); if (ret) { pr_err("fail to allocate generic chip (%d)\n", ret...