–40 to +85 °C High Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks - Up to 25 MIPS throughput with 25 MHz clock - Expanded interrupt handler Memory - 1280 bytes internal data RAM (1024 + 256) - 16 kB (C8051F310/1/...
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