All internal memory is 32 bits wide, and instructions are either 16-bit or X9253, XS1-A12A-128-FB217 XS1-A12A-128-FB217 Datasheet 21 Feature Bit Description Disable JTAG 0 The JTAG interface is disabled, making it impossible for the tile state or memory content to be accessed via the...
System USERCODE register 52 Init Description System USERCODE register: 0x0A Bits Perm Init Description 31:18 RO JTAG USERCODE value programmed into OTP SR 17:0 RO metal fixable ID code D.10 Directions 0-7: 0x0C This register contains eight directions, for packets with a mismatch in bits ...