--- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -718,6 +718,7 @@ static void omap_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) int unmasked = 0; struct irq_chip *irqchip = irq_desc_
+static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) { void __iomem *isr_reg = NULL; u32 isr; unsigned int bit; - struct gpio_bank *bank; - int unmasked = 0; - struct irq_chip *irqchip = irq_desc_get_chip(desc); - struct gpio_chip *chip = irq_desc_get_han...
NVIC_EnableIRQ(BOARD_SW2_IRQ); ``` Would this functionality be handled via the SVC service of the SCFW ? If interrupt are not available on SCU GPIO, how would I used IGPIO driver interrupt? how the IRQ is process for those GPIO ? Regards,Stan 已解决! 转到解答。 标记: gpio ...
The Rapid GPIO on the SCU do not support interrupt as mentioned for the M4 complex : https://community.nxp.com/thread/523693