@@ -286,54 +286,60 @@ static void thunderx_gpio_set_multiple(struct gpio_chip *chip, } }static void thunderx_gpio_irq_ack(struct irq_data *data) static void thunderx_gpio_irq_ack(struct irq_data *d) { struct thunderx_line *txline = irq_data_get_irq_chip_data(data); ...
#include <linux/irqdomain.h> #include <linux/export.h> #include <linux/bcma/bcma.h>@@ -79,19 +77,11 @@ static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio) }#if IS_BUILTIN(CONFIG_BCM47XX) || IS_BUILTIN(CONFIG_ARCH_BCM_5301X) ...
解决办法一: make menuconfig,依次进入 Device Drivers GPIO Surport I2C GIPO Expanders 键盘按下y选中PCA95[357]X后,exit到上一次保存;再进入I2C GIPO Expanders选中终端控制器,一直exit保存 解决办法二: …
> +static const struct irq_chip siul2_irqchip = { > + .name = "gpio-siul2", > + .irq_ack = siul2_gpio_irq_mask, > + .irq_mask = siul2_gpio_irq_mask, > + .irq_unmask = siul2_gpio_irq_unmask, > + .irq_set_type = siul2_gpio_irq_set_type, > + .flags = IRQCHIP_...
The IRQ chip interface defines only two callbacks which are executed in non-atomic contex - irq_bus_lock/irq_bus_sync_unlock, so lets move PM runtime calls there. Tested-by: Tony Lindgren <t...@atomide.com> Tested-by: Austin Schuh <aus...@peloton-tech.com> ...
static void thunderx_gpio_irq_ack(struct irq_data *data) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct thunderx_gpio *txgpio = gpiochip_get_data(gc); struct thunderx_line *txline = irq_data_get_irq_chip_data(data);write...
> it's configured as irqsafe. As result, below error report can > be seen when PM runtime API called from IRQ chip's callbacks > irq_startup/irq_shutdown/irq_set_type, because they are > protected by RAW spinlock: Grygorri I have a massive backlog of mail but if patch 6&7 are...
[PATCH v3 17/27] memory: omap-gpmc: Add irqchip support to the gpiochip The WAIT pins support either rising or falling edge interrupts so add irqchip support to the gpiochip model.