fpgahardwaresystem-on-chip UpdatedMar 24, 2025 C HyperDbg/HyperDbg Star3.2k Code Issues Pull requests Discussions State-of-the-art native debugging tools debuggerdebugginghooksecurityfpgahardwarereverse-engineeringhypervisorwindows-kerneldebugchipmalware-analysisbinary-analysislogic-analyzerdebugging-toolsecurity-...
to use the OPL3_FPGA as an OPL3 output device in ScummVM and DOSBox over USB. His code is over athttps://github.com/waltervn/opl3_fpga-appsandhttps://github.com/waltervn/dosbox. He has a daemon running on top of PetaLinux instead of bare metal on the ARM. This is very cool and...
fpga hardware system-on-chip Updated Mar 26, 2025 C HyperDbg / HyperDbg Star 3.2k Code Issues Pull requests Discussions State-of-the-art native debugging tools debugger debugging hook security fpga hardware reverse-engineering hypervisor windows-kernel debug chip malware-analysis binary-analysis ...
securityfpgahardwarereverse-engineeringhalnetlistintegrated-circuitsembedded-security Resources Readme License MIT license Activity Custom properties Stars 652stars Watchers 25watching Forks 82forks Report repository Releases59 v4.4.1Latest Jul 29, 2024 ...
cgorustgolangc-plus-plusavrarmassemblyx64reverse-engineeringmalwarehackingriscvcybersecurityassembly-languagex86assembly-language-programmingcyber-securityrisc-vreverse-engineering-tutorial UpdatedMar 9, 2025 Assembly Unicorn CPU emulator framework (ARM, AArch64, M68K, Mips, Sparc, PowerPC, RiscV, S390x...
A 3D FPGA GPU for real-time rasterization with a tile-based deferred rendering (TBDR) architecture, featuring transform & lighting (T&L), back-face culling, MSAA anti-aliasing, ordered dithering, etc. fpgagpuchiselrasterizertiled-deferredvitis-hls ...
Universal Radio Hacker: Investigate Wireless Protocols Like A Boss pythonradioiotsecurityqthackingwirelesssdrrtl-sdrhackrfairspyusrpsdrplaybladerflimesdr UpdatedJan 24, 2025 Python ainfosec/FISSURE Star1.7k Code Issues Pull requests Discussions The RF and reverse engineering framework for everyone. Follow ...
reverse-engineeringdigital-logicyosyscpld UpdatedNov 5, 2021 Python 6502 CPU implementation written in nMigen fpgahdlyosys6502nmigen UpdatedJun 3, 2021 Python A Python library, and CLI utilities, which solves HDL-to-bitstream based on FOSS.
fpga vhdl stress-testing power lfsr utilization Updated Aug 20, 2022 VHDL stef / px1000cr Star 16 Code Issues Pull requests Files related to PoC||GTFO 21:21 - NSA’s Backdoor of the PX1000-Cr crypto cryptanalysis backdoor reverse-engineering historical nsa lfsr px1000 px1000cr Updat...
A (obsolete) open-source project created to reverse-engineering some Resident Evil 3 files. gametestingroomhexmoddingevilwipextractreverse-engineeringbiohazardmsgininode-webkitsave-editorardrdtsavmodding-toolsresidentrofs UpdatedFeb 14, 2024 JavaScript ...