一个是全局中断的控制(GIC_DIST_CTRL)。一旦关闭了全局的中断,那么任何的中断源产生的中断事件都不会被传递到CPU interface。另外一个级别是对针对各个中断源进行控制(GIC_DIST_ENABLE_CLEAR),关闭某一个中断源会导致该中断事件不会分发到CPU interface,但不影响其他中断源产生中断事件的分发。控制将当前优先级最高...
(gic); unsigned long dist_base = gic_dist_base(gic); /* * Set priority on PPI and SGI interrupts */ for (i = 0; i < 32; i += 4) writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4); writel(GICC_INT_PRI_THRESHOLD, base + GIC_CPU_PRIMASK); writel(GICC_...
一个是全局中断的控制(GIC_DIST_CTRL)。一旦关闭了全局的中断,那么任何的中断源产生的中断事件都不会被传递到CPU interface。另外一个级别是对针对各个中断源进行控制(GIC_DIST_ENABLE_CLEAR),关闭某一个中断源会导致该中断事件不会分发到CPU interface,但不影响其他中断源产生中断事件的分发。控制将当前优先级最高...
GIC_PRI_IRQ <<8| GIC_PRI_IRQ, GICD_IPRIORITYR + (i /4) *4);/* Local settings: interface controller *//* Don't mask by priority */writel_gicc(0xff, GICC_PMR);/* Finest granularity of priority */writel_gicc(0x0, GICC_BPR);/* Turn on delivery */// GICC_CTL_ENABLE 允...
gicv2_dist_init staticvoid__init_textgicv2_dist_init(void){uint32_ttype;uint32_tcpumask;uint32_tgic_cpus;unsignedintnr_lines;inti;// 所有中断都往 pcpu0 发送cpumask = readl_gicd(GICD_ITARGETSR) &0xff; cpumask = (cpumask ==0) ? (1<<0) : cpumask; ...
base+GIC_DIST_CONFIG+i/4); /* * 设置默认优先级中断 */ for(i=32;i<gic_irqs;i+=4) writel_relaxed(GICD_INT_DEF_PRI_X4,base+GIC_DIST_PRI+i); /* * 关闭所有中断 */ for(i=32;i<gic_irqs;i+=32) writel_relaxed(GICD_INT_EN_CLR_X32, ...
(1) 使能或禁止中断,分发器对中断的控制分两级别,一个是全局中断控制(GIC_DIST_CTRL),一个是针对具体中断源控制(GIC_DIST_ENABLE_CLEAR), (2)控制优先级; (3)将仲裁后的最高优先级中断事件,分发给一个或多个CPU接口; (4)中断属性设定,比如触发方式等; ...
void gicv3_rdistif_mark_core_awake(uintptr_t gicr_base){ /* * The WAKER_PS_BIT should be...
gicv2_dist_init static void __init_text gicv2_dist_init(void) { uint32_t type; uint32_t cpumask; uint32_t gic_cpus; unsigned int nr_lines; int i; // 所有中断都往 pcpu0 发送 cpumask = readl_gicd(GICD_ITARGETSR) & 0xff; ...
***/ void gicv3_rdistif_mark_coreasleep(uintptr_t gicr_base) { /* Mark theconnected core as asleep */ /* 执行在core的程序,将GICR_WAKER.Processor位给置高, * 表示要disconnect redistributor。 */ gicr_write_waker(gicr_base, gicr_read_waker(_base) | WAKER_PS_BIT); /* Wait till...