gic_data.dist_base = dist_base; gic_data.redist_regions = rdist_regs; gic_data.nr_redist_regions = nr_redist_regions; gic_data.redist_stride = redist_stride;/* * Find out how many interrupts are supported. * The GIC only supports up to 1020 interrupt sources (SGI+PPI+SPI) */typer...
对于GIC而言,host_data成员指向一个struct gic_chip_data的数据结构,定义如下: struct gic_chip_data { union gic_base dist_base;---GIC Distributor的地址空间 union gic_base cpu_base;---GIC CPU interface的地址空间 #ifdef CONFIG_CPU_PM---GIC 电源管理相关的成员 u32 saved_spi_enable[DIV_ROUND_UP...
gic_set_irq(irq,GIC_DIST_ENABLE_CLEAR); } voidgicv2_unmask_irq(intirq) { gic_set_irq(irq,GIC_DIST_ENABLE_SET); } voidgicv2_eoi_irq(intirq) { writel(irq,gic_get_cpu_base()+GIC_CPU_EOI); } staticunsignedintgic_get_cpumask(structgic_chip_data*gic) { unsignedlongbase=gic_dist_...
/drivers/irqchip/irq-gic-v3.c:staticint__initgic_init_bases(void__iomem *dist_base,structredist_region *rdist_regs, u32 nr_redist_regions, u64 redist_stride,structfwnode_handle *handle){ ... ... set_handle_irq(gic_handle_irq); ... ... } /drivers/irqchip/irq-gic-v3.c: IRQ...
void __iomem *dist_base; struct redist_region *rdist_regs; u64 redist_stride; u32 nr_redist_regions; int err, i; dist_base = of_iomap(node, 0); if (!dist_base) { pr_err("%s: unable to map gic dist registers\n", node->full_name); ...
***/ void gicv3_cpuif_enable(unsigned int proc_num) { uintptr_t gicr_base; u_register_t scr_el3; unsigned int icc_sre_el3; assert(gicv3_driver_data != NULL); assert(proc_num < gicv3_driver_data->distif_num); assert(gicv3_driver_data->rdistif_base_addrs != NULL); assert...
v3_distif_pre_save(). This function tries to use gicr_base for all CPUs. Since GICR base address for secondary CPUs are not initialized, it raises assertion. To fix the issue, populate GIC v3 rdist data statically (similar to Versal) instead of dynamically initializing GIC v3 rdist ...
// Address offsets are relative to the Distributor base // address defined by the system memory map. const GICD_CTLR: DistReg = DistReg::simple(0x0, 4); const GICD_STATUSR: DistReg = DistReg::simple(0x0010, 4); const GICD_IGROUPR: DistReg = DistReg::shared_irq(0x0080, 1)...
#include <linux/log2.h> @@ -3672,6 +3673,20 @@ static int its_vpe_set_affinity(struct irq_data *d, return IRQ_SET_MASK_OK_DONE; }static void its_wait_vpt_parse_complete(void) { void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); u64 val;if...
+ int val = (sgi << 24) | (targetmask); + + __asm volatile ("msr "STR(ICC_SGI1R)", %x0" ::"r" (val)); +} Index: arch/arm64/conf/GENERIC === RCS file: /cvs/src/sys/arch/arm64/conf/GENERIC,v retrieving revision 1.23 diff -u -p -r1.23...