patches-13.x/400-LoongArch-Fix-MUSL_DYNAMIC_LINKER.patch - patches-13.x/401-LoongArch-Modify-MUSL_DYNAMIC_LINKER.patch Refresh patches: - patches-13.x/300-mips_Os_cpu_rtx_cost_model.patch - patches-13.x/970-macos_arm64-building-fix.patch Signed-off-by: Olcay Korkmaz <nuke_mania@hotmail...
0170-LoongArch-Tweak-IOR-rtx_cost-for-bstrins.patch +158 0171-LoongArch-NFC-Dedup-and-sort-the-comment-in-loongarc.patch +44 0172-LoongArch-Fix-explicit-relocs-extreme-tls-desc.c-tes.patch +45 0173-LoongArch-Define-loongarch_insn_cost-and-set-the-cos.patch +70 0174-LoongArch-TFmode...
ASM_OUTPUT_MI_THUNK CONST_COSTS RTX_COSTS DEFAULT_RTX_COSTS \ ADDRESS_COST MACHINE_DEPENDENT_REORG ASM_FILE_START ASM_FILE_END \ ASM_SIMPLIFY_DWARF_ADDR INIT_TARGET_OPTABS INIT_SUBTARGET_OPTABS \ INIT_GOFAST_OPTABS MULSI3_LIBCALL MULDI3_LIBCALL DIVSI3_LIBCALL \ DIVDI3_LIBCALL UDIVSI...
+ loongarch_cost = &loongarch_cpu_rtx_cost_data[target->cpu_tune]; + + /* If the user hasn't specified a branch cost, use the processor's + default. */ + if (!opts_set->x_la_branch_cost) + opts->x_la_branch_cost = loongarch_cost->branch_cost; ...
releases/gcc-12 a8bd38d 2024-10-16 i386: Fix expand_vector_set for VEC_MERGE/VEC_DUPLICATE RTX [PR117116]Middle end can generate SYMBOL_REF RTX as a value "val" in the callto expand_vector_set, but SYMBOL_REF RTX is not accepted in<sse2p4_1>_pinsr insn pattern, generated viaVEC...
3) It ought to be possible to generate the switch statement jump table code as a series of rtx to aid instruction scheduling and also to move the 'add' into the load offset removing an instruction. 4) In my code the only references to the stack pointer are in the function prologue ...
* Backport of [AArch32] 2/2 Remove old rtx costs * Backport of [AArch32] arm_neon.h: Add artificial and gnu_inline * Backport of [AArch32] Improve Cortex-a53 integer scheduler * Backport of [AArch32] Improve Thumb allocation order ...
, GCC’s two IRs: GIMPLE(IVOPT) & RTL , Inaccurate rtx cost ,“WRONG” address cost model for ARM , Conflict with RTL optimizations, like loop unrolling IVOPTLGORITHMVOPTLGORITHMNPUT OUTPUTost Model , GIMPLE problemsVOPTlgorithmVOPTlgorithm RTL passesTL passesREER a.SREER RTLRost Model ,...
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3) It ought to be possible to generate the switch statement jump table code as a series of rtx to aid instruction scheduling and also to move the 'add' into the load offset removing an instruction. 4) In my code the only references to the stack pointer are in the function prologue ...